Title:
算出装置、算出方法、プログラム、記憶媒体、試験システム、および、電子デバイス
Document Type and Number:
Japanese Patent JP5291586
Kind Code:
B2
Abstract:
A calculating apparatus that calculates a characteristic of a target signal, including an input section that receives a bit error or a sampling timing, and a calculating section that calculates sampling timings over a range in which the bit error rate is less than a designated value or a bit error rate at a designated sampling timing, by using a relational expression between the sampling timing and the bit error rate. A transmission model for transmitting a signal having jitter includes a random component and a deterministic component having a prescribed probability density distribution. The relational expression is achieved by substituting, as parameters, a standard deviation of a random component and a peak-to-peak value of a deterministic component in a jitter of the target signal.
Inventors:
Kiyotaka Ichiyama
Masahiro Ishida
Masahiro Ishida
Application Number:
JP2009217927A
Publication Date:
September 18, 2013
Filing Date:
September 18, 2009
Export Citation:
Assignee:
Advantest Corporation
International Classes:
H04L25/02; H04L1/00
Domestic Patent References:
| JP2000040201A | ||||
| JP2010101894A |
Foreign References:
| WO2007108493A1 | ||||
| WO2008018587A1 | ||||
| WO2008018588A1 |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation