Title:
CAPACITOR AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3287556
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a capacitor which can restrain generation of lifting between a polysilicon pattern and a barrier metal film, forming an upper electrode during manufacturing of a WACC(wirebond attached chip capacitor), and to provide its manufacturing method.
SOLUTION: A capacitor consists of a lower electrode, a dielectric film and an upper electrode, and the upper electrode is formed of a laminated structure of a first undoped polysilicon film 106a, a doped polysilicon film 106b and a second undoped polysilicon film 106c.
Inventors:
Lee Jin Tao
Shin Heonjong
Shin Heonjong
Application Number:
JP2000147115A
Publication Date:
June 04, 2002
Filing Date:
May 18, 2000
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
H01L27/04; H01L21/60; H01L21/822; H01L25/16; H01L27/08; H01L27/10; H01L29/94; (IPC1-7): H01L21/822; H01L21/60; H01L27/04
Domestic Patent References:
| JP3204967A | ||||
| JP61295644A |
Attorney, Agent or Firm:
Makoto Hagiwara
Previous Patent: PREPARATION OF RARE EARTH METAL ALKOXIDE SOLUTION
Next Patent: MANUFACTURE OF SEMICONDUCTOR DEVICE
Next Patent: MANUFACTURE OF SEMICONDUCTOR DEVICE