Title:
CDMA RECEIVER
Document Type and Number:
Japanese Patent JP3741515
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To shorten the followup time of averaging circuit output and to improve reception quality by invalidizing a residual value inside an averaging circuit so as not to affect following averaging circuit outputs when the reassignment of demodulation phase occurs.
SOLUTION: Based on a multipath phase retrieved by a search circuit 108, path information 113 and smoothed signals 120, 121 and 122, it is judged at a comparative judge circuit 109 whether or not phase reassignment is to be performed. When the reassignment of phase occurs, a new path phase is reported through a signal line 114, 115 or 116 to a target correlator. Then, various kinds of information with the phase reassignment are inputted through a signal line 117, 118 or 119 to the averaging circuit following the correlator to be the object of phase reassignment. At an averaging circuit 105, 106 or 107 to be the object, the residual value is made invalid.
Inventors:
Masahiko Goto
Application Number:
JP11174797A
Publication Date:
February 01, 2006
Filing Date:
April 15, 1997
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H04B1/707; G06F17/18; H04B1/10; H04B1/69; H04B1/7073; (IPC1-7): H04B1/69; G06F17/18; //H04B1/10
Domestic Patent References:
| JP11508419A | ||||
| JP8508152A | ||||
| JP7202756A |
Foreign References:
| WO1995007577A1 |
Attorney, Agent or Firm:
Masaaki
Ohashi
Masanori Hirano
Hayashi Hiroki
Ohashi
Masanori Hirano
Hayashi Hiroki