Title:
CELL INTERLEAVING METHOD FOR ASYNCHRONOUS TRANSFER MODE(ATM) EXCHANGE SYSTEM
Document Type and Number:
Japanese Patent JP3408215
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To minimize cell loss and cell transmission delay by improving the interleaving method of a cell header by transmitting the bits of a header field and first to (i-1) bits among (n) bits in an information field to the side of reception while successively coupling them.
SOLUTION: After all the cell headers of 5 bytes are outputted to a first buffer in a unit cell 10 of 53 bytes, an FPJ respective divides the information field of 48 bytes, namely, 384 bits from the first bit to 320th bit for the unit of 8 bits and transmits the first to seventh bits except the eighth bit among 8 bits through a data transmission line S1 to an output controller 40. The output controller 40 performs primary interleaving while coupling the received 7 bits and one bit having the highest priority among 40 bits on standby in a parallel/ serial converter 30 and successively transmits the parallel data of interleaved 8 bits.
Inventors:
Xu Dongseki
Application Number:
JP30781399A
Publication Date:
May 19, 2003
Filing Date:
October 28, 1999
Export Citation:
Assignee:
LG Electronics Co., Ltd.
International Classes:
H04B14/04; H04L7/08; H04L47/43; (IPC1-7): H04L12/56
Domestic Patent References:
| JP8237146A | ||||
| JP787099A | ||||
| JP5284148A | ||||
| JP5167606A | ||||
| JP6152626A | ||||
| JP7170246A |
Attorney, Agent or Firm:
Shusaku Yamamoto
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