PURPOSE: To reduce power consumption by making a CRC arithmetic control means to stop the operation of a CRC residue calculation circuit for a time used other than the input of a data string of a header part of a received cell during one cell period.

CONSTITUTION: The circuit is provided with an OR circuit 30, an AND circuit 31, and AND circuit groups 32,33 each having eight AND circuits connected in parallel being a CRC arithmetic control means, which stops the operation of a CRC residue calculation circuit 19 for a time used other than the input of a data string of a header part of a received cell during one cell period when an output from a protection circuit 26 indicates a synchronization establishment state. Moreover, the CRC residue calculation circuit 19 includes at top stages a 1-byte delay circuit 16 in addition to 4-stages of 8-parallel CRC part arithmetic and latch circuit 18, and further is provided with a 5-byte delay circuit 17 and an error correction error check circuit 28.