Title:
CHANNEL BUS CONTENTION CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH01152840
Kind Code:
A
Abstract:
PURPOSE:To control the contention of right of use by controlling the use of right of external channel bus depending on the use right bit state in a control memory of a 64kbps time division time switch and an 8kbps time division time switch. CONSTITUTION:When the 64kbps time division time switch 10 uses a channel bus 30, the use right bit of a time slot of the 8kbps time division time switch 20 is reset unconditionally and the use right bit of the time slot of the 64kbps time division time switch 10 is set. Conversely, when the control of the 8kbps time division time switch 20 is required, the control memory 200 reads out once the data designating the use right bit for maintenance, and when the use of right bit is reset, the use of right bit of the time slot of the 64kbps time division time switch 10 is reset and the use of right bit of the 8kbps time division time switch 20 is set to write an idle pattern as a data from the control memory 22.
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Inventors:
OTSUKA YASUKO
Application Number:
JP31285687A
Publication Date:
June 15, 1989
Filing Date:
December 09, 1987
Export Citation:
Assignee:
NEC CORP
International Classes:
(IPC1-7): H04L11/20
Domestic Patent References:
| JPS615655A | 1986-01-11 | |||
| JPS62265888A | 1987-11-18 | |||
| JPS6377296A | 1988-04-07 | |||
| JPS6372294A | 1988-04-01 |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
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