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Title:
CHARGE TRANSFER DEVICE AND ITS DRIVING METHOD
Document Type and Number:
Japanese Patent JP2000150865
Kind Code:
A
Abstract:

To reduce effect due to coupling, noise, or the like, and also fully obtain the period of reference potential on an output waveform even if a drive speed is increased for facilitating signal processing at a later stage by adding the signal charge of a plurality of pixels at the transfer part of the final stage of a charge transfer resistor.

In pixel thin-out driving, a reset pulse RS is set once every two pixels, and at the same time a transfer clock pulse LH being independently applied to the transfer part of the final stage of a CCD register is set to a pulse with width W1 over two pulses of a transfer clock pulse 1 of a pre-stage and the frequency of 1/2 of transfer clock pulses 1 and 2, thus obtaining the same output as when only the reset pulse RS is thinned out, at the same time, eliminating effect due to coupling, noise, or the like caused by the transfer clock pulse LH in an output Vout waveform, and hence obtaining an accurate output signal.


Inventors:
YASUDA MINORU
HIRAMA MASAHIDE
Application Number:
JP32538398A
Publication Date:
May 30, 2000
Filing Date:
November 16, 1998
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/339; H01L27/148; H01L29/762; H04N5/335; H04N5/341; H04N5/345; H04N5/347; H04N5/365; H04N5/372; H04N5/378; (IPC1-7): H01L29/762; H01L21/339; H01L27/148; H04N5/335
Attorney, Agent or Firm:
Hidekuma Matsukuma