Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CHARGING DEPTH CALCULATING CIRCUITRY
Document Type and Number:
Japanese Patent JP2009109269
Kind Code:
A
Abstract:

To provide charging depth calculating circuitry which can reduce an error in SOC (State of Charge), irrespective of the state of charge and discharge of an electricity accumulating device.

The circuitry has a current measuring part 502 which detects a current flowing to the electricity accumulating device 300, a coefficient setting part 531 and multiplying part 521 which compensate a current value detected by the current measuring part 502, a charging depth calculating part 522 which calculates a charging depth of the device 300 by integrating the compensated current value, an electromotive force transducing part 528 which estimates a terminal voltage of the device 300 from the charging depth calculated by the charging depth calculating part 522, and a voltage measuring part 501 which acquires the terminal voltage of the device 300. The coefficient setting part 531 sets a coefficient so as to reduce a difference between the terminal voltage estimated by the electromotive force transducing part 528 and the terminal voltage acquired by the voltage measuring part 501, and compensates the current value.


Inventors:
IIDA TAKUMA
Application Number:
JP2007280306A
Publication Date:
May 21, 2009
Filing Date:
October 29, 2007
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
PANASONIC CORP
International Classes:
G01R31/36; H01M10/48; H02J7/00
Attorney, Agent or Firm:
Etsushi Kotani
Takao Ito
Jiro Higuchi
Hiroto Onishi