Title:
CHIP COMPONENT
Document Type and Number:
Japanese Patent JP3623477
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a chip component such as a network component, etc., that can obtain sufficient fixability or a sufficiently high self-aligning property when the component is soldered to a substrate.
SOLUTION: In the network component A constituted as the chip component, the lower-surface electrode layer 40 of an electrode section 20 provided in the end section of the component A is closely formed to the end position T of an insulating substrate 10, and a lower-surface electrode section K is formed in a state where the section K is protruded outward from the end position T and, at the same time, upward along the end face of the substrate 10. A notch 14 is formed on the substrate 10 so that the lower-surface electrode layer 40 may also reach the end face side of the substrate 10.
Inventors:
Kasugai Hideki
Application Number:
JP2001379068A
Publication Date:
February 23, 2005
Filing Date:
December 12, 2001
Export Citation:
Assignee:
Taiyosha Electric Co., Ltd.
International Classes:
H01C13/02; H01C7/00; (IPC1-7): H01C7/00; H01C13/02
Domestic Patent References:
| JP11097205A | ||||
| JP5335104A | ||||
| JP9139303A | ||||
| JP6029102A | ||||
| JP2002231503A |
Attorney, Agent or Firm:
Fumio Nagaya
Naoki Nagaya
Naoki Nagaya
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