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Title:
基板内層用チップ抵抗器
Document Type and Number:
Japanese Patent JP6715024
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a component built-in circuit board capable of reducing surface temperature rise incident to heat generation, while reducing resistance value change caused by flexure stress, and to provide a chip resistor for board inner layer that is built in such a circuit board.SOLUTION: In a component built-in circuit board, a chip resistor 3 is embedded in the resin layer 2 of a base substrate, and a connection via 5 formed in this resin layer 2 is connected with the external electrode of the chip resistor 3. The chip resistor 3 is built in the resin layer 2 while directing the first surface of an insulating substrate, on which a pair of internal electrode and a resistor and a protection film are formed, laterally, and the connection via 5 is connected with the external electrode formed on the second surface adjacent to the first surface and directing upward.SELECTED DRAWING: Figure 1

Inventors:
Kentaro Matsumoto
Application Number:
JP2016032409A
Publication Date:
July 01, 2020
Filing Date:
February 23, 2016
Export Citation:
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Assignee:
koa corporation
International Classes:
H05K3/46; H01C1/142; H01C7/00
Domestic Patent References:
JP2013153137A
JP2013051441A
JP11162706A
JP2011199188A
JP2012079994A
JP2007235110A
JP9330802A
Foreign References:
WO2012133313A1
Attorney, Agent or Firm:
Patent Business Corporation Takewa International Patent Office