Title:
チップ抵抗器およびその製造方法
Document Type and Number:
Japanese Patent JP7272523
Kind Code:
B2
Abstract:
To improve heat dissipation and thermal expansion characteristics by using a Si3N4 substrate as a substrate of a chip resistor, and suppress swelling of a fired film (resistor film, electrode).SOLUTION: A chip resistor includes a rectangular parallelepiped insulating substrate, a resistor formed on one surface of the insulating substrate, and electrodes formed at both ends of the resistor, and the insulating substrate is made of silicon nitride ceramics, and the insulating substrate has a modified layer formed on its surface.SELECTED DRAWING: Figure 2
Inventors:
Atsuo Yasumori
Aya Watanabe
▲高▼木 剛
Koichi Urano
Hisakazu Nagata
Aya Watanabe
▲高▼木 剛
Koichi Urano
Hisakazu Nagata
Application Number:
JP2019042192A
Publication Date:
May 12, 2023
Filing Date:
March 08, 2019
Export Citation:
Assignee:
Tokyo University of Science
koa corporation
koa corporation
International Classes:
H01C7/00; H01C1/084; H01C17/065
Domestic Patent References:
| JP63100794A | ||||
| JP11195505A |
Attorney, Agent or Firm:
Patent Attorney Corporation Hiraki International Patent Office