Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CHIP TYPE NOISE ELIMINATION FILTER
Document Type and Number:
Japanese Patent JPS6039910
Kind Code:
A
Abstract:

PURPOSE: To obtain a chip type noise elimination filter mounted directly on a printed board or the like by allowing a ferrite board to act like an inductance to a conductive path assembled between the flat ferrite boards.

CONSTITUTION: Electrodes 14a, 14b of a chip capacitor 14 are soldered respectively to a wide part 13a of a middle part of the conductive path 13 and an earth electrode 17a. The other ferrite board 12 having a concaved part (not shown) to which the capacitor 14 is inserted is bonded to the major plane where the conductive path 13 of the ferrite board 11 and the earth electrode 17a are formed. Through the constitution above, the ferrite boards 11, 12 act like inductances L15 and L16 to a part reaching the wide part 13a from an input terminal 15 of the conductive path 13 and a part reaching an output terminal 16 from the wide part 13a, the L15 and the L16 are connected respectively between the input terminal 15 and the wide part 13a and between the output terminal 16 and the wide part 13a, and the chip type noise elimination filter where the capacitor 14 is connected between the wide part 13a and the earth terminal 17 is obtained.


Inventors:
Yamamoto, Hidetoshi
Hori, Toshio
Fujiki, Yasuo
Application Number:
JP1983000148959
Publication Date:
March 02, 1985
Filing Date:
August 15, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MURATA MFG CO LTD
International Classes:
H03H7/075; H03H1/00; (IPC1-7): H03H7/01