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Patent Searching and Data


Title:
CIRCUIT ARRANGEMENT FOR REGULATION OF CURRENT THROUGH LOAD
Document Type and Number:
Japanese Patent JP2009065638
Kind Code:
A
Abstract:

To provide a circuit arrangement of high cost efficiency, which can regulate a load current as the function of voltage drop at both ends of a load, preferably, as the function of temperature and comprises a small number of components for regulating a current due to a load, in particular, a fan motor.

A circuit arrangement 1 for the regulation of a current IL through a load RL comprises: a resistance, through which a load current IL flows and across which a voltage drops, which serves as a control variable X for the regulation of the load current IL, a tapping point P for a reference voltage Vref, which serves as a command variable W for the regulation of the load current IL, and a differential amplifier for the amplification of the control deviation W-X between command variable W and control variable X. In the circuit arrangement 1, in order to regulate the load current IL as the function of the load voltage VL, a transistor Q4 and also a collector resistance R2 and an emitter resistance R6 are arranged, wherein the series connection of the base-emitter section of the transistor Q4 and the emitter resistance R6 is arranged in parallel with the load RL, and wherein the tapping point P for the reference voltage is arranged between the collector resistance R2 and the transistor Q4.


Inventors:
ZAMETZKY KLAUS
Application Number:
JP2008166038A
Publication Date:
March 26, 2009
Filing Date:
June 25, 2008
Export Citation:
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Assignee:
SITRONIC ELEKTROTECH AUSRUEST
International Classes:
H03F3/34; H03F1/52
Attorney, Agent or Firm:
Another role Shigehisa
Satoshi Muramatsu