Title:
回路基板及びその製造方法
Document Type and Number:
Japanese Patent JP7101512
Kind Code:
B2
Abstract:
An issue of the invention is to easily determine whether or not a positional deviation between a circuit substrate and electronic components mounted on the circuit substrate is good in a short time, and to improve the throughput of the determination process. Solution means is that a circuit substrate 2 mounted with a component 23 has a mounting structure comprising a first connection pad 17 and a second connection pad 18 for mounting the component 23, and a recognition mark 10a configured on the same layer as the mounting structure. The recognition mark 10a comprises a first portion 11 and a second portion 12 separately configured at a first spacing S1 from the first portion 11 along a first direction x and having a first width W1 in the first direction x. Moreover, a manufacturing method of the circuit substrate 2 has a preparation process of preparing a substrate and a mounting structure formation process of forming the mounting structure comprising the first connection pad 17 and the second connection pad 18 for mounting the component 23 on the substrate. The mounting structure formation process comprises a mark forming process of simultaneously forming at least portion of the mounting structure and the recognition mark 10a.
Inventors:
Satomi Namatenme
Takahiko Furuhashi
Takahiko Furuhashi
Application Number:
JP2018062565A
Publication Date:
July 15, 2022
Filing Date:
March 28, 2018
Export Citation:
Assignee:
FDK Corporation
International Classes:
H05K3/34
Domestic Patent References:
| JP11251695A | ||||
| JP5335706A | ||||
| JP2017045813A | ||||
| JP2005251930A | ||||
| JP2010008455A |
Foreign References:
| WO2013065420A1 |
Attorney, Agent or Firm:
Koji Nagato