Title:
回路基板の製造方法
Document Type and Number:
Japanese Patent JP4978691
Kind Code:
B2
Abstract:
Producing a circuit board, by laminating, on a substrate, an adhesive film with a metal film, which comprises a water-soluble polymer release layer, a metal film layer and a curable resin composition layer, which are formed in this order on a support layer, and has a release property enabling detachment of said water-soluble polymer release layer from the support layer after curing of the curable resin composition layer, such that the curable resin composition layer contacts the substrate; curing the curable resin composition layer; detaching the support layer, and removing the water-soluble polymer release layer present on the metal film layer by dissolving the release layer in an aqueous solution, efficiently forms an insulating layer and a metal film layer superior in adhesiveness to the insulating layer and in uniformity.
Inventors:
Hirohisa Narahashi
Shigeo Nakamura
Yokota Tadahiko
Shigeo Nakamura
Yokota Tadahiko
Application Number:
JP2009501289A
Publication Date:
July 18, 2012
Filing Date:
February 28, 2008
Export Citation:
Assignee:
AJINOMOTO CO.,LTD.
International Classes:
B32B15/08; B32B27/00; H05K1/03
Domestic Patent References:
| JP2004230729A | 2004-08-19 | |||
| JP2006228919A | 2006-08-31 | |||
| JPS63228798A | 1988-09-22 | |||
| JP2005056269A | 2005-03-03 | |||
| JP2003095947A | 2003-04-03 | |||
| JP2005311202A | 2005-11-04 | |||
| JP2002324969A | 2002-11-08 |
Attorney, Agent or Firm:
Takashima Ichi
Kyoko Doi
Mitsunori Kamata
Yaeko Tamura
Kenji Yamamoto
Murata Miyuki
Kyoko Doi
Mitsunori Kamata
Yaeko Tamura
Kenji Yamamoto
Murata Miyuki