Title:
CIRCUIT BOARD AND MOUNTING METHOD FOR CAPACITOR ELEMENT
Document Type and Number:
Japanese Patent JP2014183173
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a circuit board that is able to reduce noise while preventing thickness increase.SOLUTION: In a circuit board 1A, a plurality of multilayer ceramic capacitors 10A1, 10A2 of approximately rectangular parallelepiped shape are mounted on a wiring board 2. The multilayer ceramic capacitors 10A1, 10A2 are arranged adjacent to each other along a direction parallel to the principal surface of the wiring board 2. The respective directions in which the opposite faces of the multilayer ceramic capacitors 10A1, 10A2 are distorted during the application of voltage thereto are opposite to each other. The total of the amounts of distortion that occur in the multilayer ceramic capacitors 10A1, 10A2 is always almost constant in the direction in which the multilayer ceramic capacitors 10A1, 10A2 are arranged.
Inventors:
DOGAKIUCHI KAZUO
Application Number:
JP2013056467A
Publication Date:
September 29, 2014
Filing Date:
March 19, 2013
Export Citation:
Assignee:
MURATA MANUFACTURING CO
International Classes:
H05K1/18; H01G2/06; H01G4/38
Attorney, Agent or Firm:
Patent business corporation Fukami patent firm
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