PURPOSE: To improve an automated circuit design process.
CONSTITUTION: In an integrated circuit designing method in which each stage of an integrated circuit design is optimized by a formal hierarchy, the physical and logical characteristic of the design is organized to be optimized for the physical design of the integrated circuit. In this method, a global arrangement 700 is optimized to be stored in the section of the logical segment of the circuit design, on the effect of a segment arrangment for the timing and wiring possibility of the circuit. Next, in this method, the moving 800 of each circuit within a specified segment to other segments is performed to improve each segment, the timing of the the whole circuit and the wiring possibility. Lastly, the information on the assignment of the circuit to the logical segment and the logical segment assignment to a physical location is delivered to the normal process for a final detailed circuit arrangement 950 and a wiring in this method.
SUCHIIBUN EDOWAADO BETSURO
UIRUMU ERUNSUTO DONAATO
SAN YON HAN
JIYOZEFU HATSUTO JIYUNIA
JIEROOMU MAABUIN KURUTSUBAAGU
ROJIYAA AI MAKUMIRAN
REINI JIYON NOOMAN
SHIRIRU AASAA PURAISU
RARUFU WAANAA UIRUKU
