Title:
CIRCUIT FOR DETECTING SYNCHRONIZING SIGNAL
Document Type and Number:
Japanese Patent JP3252940
Kind Code:
B2
Abstract:
PURPOSE: To select and output a phase-locked signal from a phase-locked circuit and to generate a driving signal with a prescribed timing at a timing signal generation part based on the output in the case where a horizontal synchronizing signal can not be separated in the synchronizing separator due to noise or the like.
CONSTITUTION: The device consists of a synchronizing separator 2 separating a horizontal synchronizing signal from a video signal input, phase-locked circuit 3 outputting a phase-locked signal subjected to phase-locking with the horizontal synchronizing signal inputted from the separator 2, and synchronizing signal detection circuit 10 consisting of gate circuits 4, 8, and 9 inputting the output from the separator 2 and the circuit 3 and selecting the phase-locked signal when no horizontal synchronizing signal is detected at the output and multivibrators 5 and 6. Based on the output from the circuit 10, the driving signal is outputted from the timing signal generation part in the prescribed timing.
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Inventors:
Toshihiko Hayashi
Application Number:
JP13748394A
Publication Date:
February 04, 2002
Filing Date:
June 20, 1994
Export Citation:
Assignee:
Fujitsu General Limited
International Classes:
G09G3/36; G09G3/20; H04N5/06; H04N5/66; (IPC1-7): H04N5/06; G09G3/20; G09G3/36; H04N5/66
Domestic Patent References:
| JP633577A | ||||
| JP444469A | ||||
| JP472785U |