Title:
CIRCUIT DEVICE WITH REVERSE-CURRENT BLOCKING CIRCUIT
Document Type and Number:
Japanese Patent JP3226002
Kind Code:
B2
Abstract:
PURPOSE: To provide a reverse-current blocking circuit which is less in voltage drop and power loss when the circuit operates normally.
CONSTITUTION: A pair of power terminals 2 and 3 is provided to connect a DC power source 1 composed of a battery and an FET 10 is connected between the terminals 2 and 3 through a circuit 4 to be protected in such a direction that an electric current flows to the drain of the FET 10 from the source of the FET 10 when the power source 1 is normally connected. Then the gate of the FET 10 is connected to one terminal 2 through a resistor 11 and a light emitting diode 12 is connected between the terminals 2 and 3 through a resistor 13. In addition, a phototransistor optically coupled with the diode 12 is connected between the gate and source of the FET 10.
Inventors:
Kazuya Ozawa
Application Number:
JP12892595A
Publication Date:
November 05, 2001
Filing Date:
April 28, 1995
Export Citation:
Assignee:
TEAC Corporation
International Classes:
H02J7/00; H02H11/00; H02J1/00; (IPC1-7): H02J7/00; H02H11/00
Domestic Patent References:
| JP6348350A | ||||
| JP63154020A |
Attorney, Agent or Firm:
Noritsugu Takano
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