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Title:
CIRCUIT AND METHOD FOR CORRECTING CLOCK, MOBILE BODY TERMINAL, AND BASE STATION DEVICE
Document Type and Number:
Japanese Patent JP2007243586
Kind Code:
A
Abstract:

To provide an inexpensive clock correcting circuit to be applied to a specified low power radio system, and also to provide a mobile body terminal, a base station device, and a clock correcting method.

As shown in Fig.4, the clock correcting circuit includes: a frequency data storage circuit for storing frequency data corresponding to a channel and outputting the frequency data corresponding to the channel to be designated by a channel selection signal; a frequency correcting circuit for calculating a frequency setting value by performing calculation with the use of a frequency correction value determined in response to circumferential temperature and the frequency data; a voltage control oscillator 421 for generating a first frequency, based on a clock signal; and a PLL 422 for generating a desired second frequency by performing calculation with the use of the first frequency and the frequency setting value.

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
ICHIKAWA TAKESHI
Application Number:
JP2006062939A
Publication Date:
September 20, 2007
Filing Date:
March 08, 2006
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H03L1/02
Domestic Patent References:
JP2004166179A2004-06-10
JP2002164783A2002-06-07
JP2003069426A2003-03-07
JP2000509219A2000-07-18
JP2002325034A2002-11-08
JPS6335017A1988-02-15
JPH09289448A1997-11-04
JPS6132613A1986-02-15
JPS63217830A1988-09-09
JP2002353835A2002-12-06
Attorney, Agent or Firm:
Koichi Suzuki