To provide a circuit which converts a high-voltage signal of approximately -200 to -50 V into a low-voltage logic signal of 3 to 5 V or 0 V.

The circuit is equipped with a 1st power source VDD, a 2nd power source VSS, and a 3rd power source GND and consists of a differential circuit DEF consisting of a 1st transistor TR1 and a 2nd transistor TR2 operating with the 1st power source VDD and 2nd power source VSS, a current mirror circuit CM as the load on the differential circuit DEF, a reference voltage Vref applied to one input of the differential circuit DEF and a high-voltage input signal Vin applied to the other input of the differential circuit DEF, an inverter circuit INV which operates with the 1st power source VDD and 3rd power source GND, and a level shift circuit SH provided between the current mirror circuit CM and inverter circuit INV.