Title:
CIRCUIT AND METHOD FOR GENERATING FAULT NOTIFYING CELL
Document Type and Number:
Japanese Patent JP3657459
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To generate a fault notifying cell speedily after a fault is detected by inserting the fault notice cell into a free main signal cell, when the value obtained by adding a specific value to a stored common count value reaches a current common count value.
SOLUTION: A fault notice cell generation control part 7 accesses a memory 2 for fault management and a memory 3 for generation control according to the common count value outputted by a timing control part 4 and the connection number outputted by a connection retrieval part 5 to read out fault states, fault detection timing, and initial generation flags corresponding to connection numbers 1 to N. When a fault state is 1 or an initial generation flag is 1 and the addition value obtained by adding 1 to the fault detection timing reaches the current common count value, a fault notice cell generation request 11 is outputted to a fault notice cell insertion part 8. The fault notice cell insertion part 8 generates and inserts a fault notice cell into a main signal cell at a vacont cell position.
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Inventors:
Naoko Koizumi
Mitsuyoshi Iwasaki
Prolong life
Mitsuyoshi Iwasaki
Prolong life
Application Number:
JP13844699A
Publication Date:
June 08, 2005
Filing Date:
May 19, 1999
Export Citation:
Assignee:
Mitsubishi Electric Corporation
Mitsubishi Electric Engineering Co., Ltd.
Mitsubishi Electric Engineering Co., Ltd.
International Classes:
H04L69/40; H04L12/28; (IPC1-7): H04L12/28; H04L12/24; H04L12/26; H04L29/14
Domestic Patent References:
| JP10070545A | ||||
| JP10308741A | ||||
| JP9106360A | ||||
| JP9018485A |
Attorney, Agent or Firm:
Hiroaki Tazawa
Konobu Kato
Konobu Kato