Title:
CIRCUIT PACKAGE INCLUDING METALLIC SUBSTRATE, AND MOUNTING METHOD
Document Type and Number:
Japanese Patent JP2903013
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a package for mounting an integrated circuit chip on a circuit board or the like.
SOLUTION: A package includes a chip carrier 10 having a metallic substrate 12. A dielectric film 20 is provided on at least one face, and the film has a thickness of, preferably about 20μm or under, and has a permittivity of, preferably, about 3.5 to 4.0. A chip mounting pad 22, a connection pad 24, and a circuit trace 26 for connecting the chip mounting pad to the connection pad is made on the dielectric film 20. An IC chip 30 is mounted on the face of the metallic substrate having the dielectric film, by flip chip bonding or wire bonding. An electric lead 38 extends from the connection pad 24 on the chip carrier, and is connected to the corresponding pad on the circuit board, whereby the I/O signal of the IC chip is provided.
Inventors:
SUTEFUAN UESUREI MATSUKUWARII
UEIN RASERU SUTOO
JEEMUZU UOOREN UIRUSON
UEIN RASERU SUTOO
JEEMUZU UOOREN UIRUSON
Application Number:
JP302498A
Publication Date:
June 07, 1999
Filing Date:
January 09, 1998
Export Citation:
Assignee:
INTAANASHONARU BIJINESU MASHIINZU CORP
International Classes:
H01L21/58; H01L21/70; H01L21/60; H01L23/00; H01L23/053; H01L23/12; H01L23/14; H01L23/28; H01L23/32; H01L23/36; H01L23/495; H01L27/00; H01L27/12; (IPC1-7): H01L23/12; H01L21/60
Domestic Patent References:
| JP4338669A | ||||
| JP529492A |
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)
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