Title:
CIRCUIT PATTERN INSPECTION APPARATUS AND METHOD
Document Type and Number:
Japanese Patent JP2012169636
Kind Code:
A
Abstract:
To provide a circuit pattern inspection apparatus and method that can make focus adjustment without hindering inspection of a circuit pattern.
The circuit pattern inspection apparatus is configured to display, on a monitor 50, images for detection 522, 523 and 524 in respective chip regions and inspects defect of their circuit patterns by using such displayed images, when it inspects a semiconductor wafer having a plurality of chip regions (dies) whose circuit patterns are identical. In addition, the circuit pattern inspection apparatus separates a prescribed image-region from the images for detection 522, 523 and 524 in respective chip regions and makes automatic focus adjustment using the separated images.
Inventors:
MOMOSE YOSHITAKE
KAWAKI KOJI
KAWAKI KOJI
Application Number:
JP2012061581A
Publication Date:
September 06, 2012
Filing Date:
March 19, 2012
Export Citation:
Assignee:
HITACHI HIGH TECH CORP
International Classes:
H01L21/66; H01J37/21; H01J37/22
Domestic Patent References:
| JPH0325357A | 1991-02-04 | |||
| JPH10154479A | 1998-06-09 |
Attorney, Agent or Firm:
Yusuke Hiraki
Sekiya Mitsuo
Toshiaki Watanabe
Sekiya Mitsuo
Toshiaki Watanabe