CLOCK GENERATION CIRCUIT

Title:

CLOCK GENERATION CIRCUIT

Document Type and Number:

Japanese Patent JP2007235578

Kind Code:

A

Abstract:

To provide a clock generation circuit which can be commonly used in a plurality of different broadcasting systems and achieve simplification and miniaturization of a circuit composition.

While using a voltage controlled oscillator 11 with a wide frequency variable range compared to a conventional voltage controlled crystal oscillator, using frequency dividers 12, 14 which can carry out variable setting of the division value, one set of the voltage controlled oscillator 11 can be commonly used for each broadcasting system by only reading out the respective dividing values of the frequency dividers 12, 14 from a frequency dividing value setting table 16 according to the broadcasting system of terrestrial digital broadcasting signals, and setting it.

Inventors:

OTSUKA KUNIAKI

Application Number:

JP2006055021A

Publication Date:

September 13, 2007

Filing Date:

March 01, 2006

Export Citation:

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Assignee:

TOSHIBA CORP

International Classes:

H03L7/183; G06F1/08; H03K21/00

Attorney, Agent or Firm:

Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto

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