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Title:
CLOCK GENERATOR AND CLOCK CONVERSION CIRCUIT
Document Type and Number:
Japanese Patent JP3956768
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To solve a problem that a frequency not suitable for a task is often generated with a clock generator which generates clocks of a plurality of frequencies, and that useless power is consumed in that event.
SOLUTION: The clock generator includes: a clock generater 11 which generates clocks clk of predetermined frequencies; a counter 13 which operates in synchronization with the clock clk and counts pulses of the clock clk; a comparator 14 which compares the counter value of the counter 13 with the number of pulses cmpd of the clock of a desired frequency freq; and output gates 15, 16 which control the supply and half of the pulse of the clock clk inputted from the clock generation part 11, on the basis of the comparison result obtained with the comparator 14.


Inventors:
Tetsumasa Meguro
Application Number:
JP2002138020A
Publication Date:
August 08, 2007
Filing Date:
May 14, 2002
Export Citation:
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Assignee:
ソニー株式会社
International Classes:
G06F1/04; G06F1/06; G06F1/08; G06F1/32; H03K5/00; H03K23/64; (IPC1-7): G06F1/04; G06F1/06; //H03K5/00; H03K23/64
Domestic Patent References:
JP7319575A
JP7129272A
JP5257562A
JP52060555A
JP2002135088A
Attorney, Agent or Firm:
Takahisa Sato