Title:
CLOCK MANAGEMENT METHOD IN SYNCHRONOUS NETWORK SYSTEM AND TRANSMITTER
Document Type and Number:
Japanese Patent JP3460118
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To continue synchronous communication in a synchronous network system on deterioration in quality of a clock signal by automatically selecting another clock signal with respect to the clock management method in a synchronous network system and transmitter.
SOLUTION: A clock changeover section 5 selects a clock signal among a plurality of clock signals including a clock signal received and extracted by transmission/reception sections 1, 2 of the transmitter of a synchronous network system and a clock signal from an external clock source 3 based on quality information transferred with each clock signal and inputs the selected clock signal as a master clock signal to a clock generating section 4. The clock generating section 4 generates a clock signal and gives it to the transmission/reception sections 1, 2. A quality discrimination processing section 6 refers a synchronization management table 7 where a threshold of the quality level of the clock signal is set and a quality control table 8 which converts quality information into a quality level to send warning when the quality level of the quality information of the master clock signal is deteriorated more than the threshold.
Inventors:
Maeda Yoo
Masa Tanaka
Masa Tanaka
Application Number:
JP23978198A
Publication Date:
October 27, 2003
Filing Date:
August 26, 1998
Export Citation:
Assignee:
富士通株式会社
International Classes:
H04J3/00; H04J3/06; H04L7/00; H04L7/02; H04Q11/04; (IPC1-7): H04J3/06; H04J3/00; H04L7/00; H04L7/02
Domestic Patent References:
| JP10112711A | ||||
| JP10136000A | ||||
| JP918436A | ||||
| JP964842A |
Attorney, Agent or Firm:
Shoji Kashiwaya (2 outside)