Title:
CLOCK RECOVERY CIRCUIT OF ATM RECEIVER
Document Type and Number:
Japanese Patent JPH08111685
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide an ATM receiver, especially the clock recovery circuit of the ATM receiver. SOLUTION: In this clock recovery circuit of the ATM receiver, the frequency of source signals transmitted by an ATM cell is automatically withdrawn and sub circuits 3-5 decide the nominal bit speed of the source signals based on a cell speed and generate clock signals provided with the frequency matched with it. Second sub circuits 6-10 correct the frequency of the clock signals generated by first sub circuits proportionally to a difference between the nominal bit speed and an average actual bit speed.
Inventors:
HAN HION TAN
Application Number:
JP24272595A
Publication Date:
April 30, 1996
Filing Date:
September 21, 1995
Export Citation:
Assignee:
NEDERLAND PTT
International Classes:
H04L7/027; H04J3/06; H04Q3/00; H04Q11/04; H04L12/56; (IPC1-7): H04L12/28; H04L7/027; H04Q3/00
Domestic Patent References:
| JPH04362827A | 1992-12-15 | |||
| JPH06152632A | 1994-05-31 | |||
| JPH03114333A | 1991-05-15 | |||
| JPH0630043A | 1994-02-04 | |||
| JPH05244113A | 1993-09-21 | |||
| JPH04362830A | 1992-12-15 | |||
| JPH06177890A | 1994-06-24 |
Attorney, Agent or Firm:
Takehiko Saito
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