CLOCK SIGNAL GENERATING DEVICE, COMMUNICATION DEVICE AND SEMICONDUCTOR DEVICE

Title:

CLOCK SIGNAL GENERATING DEVICE, COMMUNICATION DEVICE AND SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JP3891877

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To change the average frequency of a clock signal independently from a reference clock signal.
SOLUTION: A reference clock signal generating circuit 1 generates a reference clock signa. A dividing circuit 2 divides the reference clock signal by a natural number n (≥1). A control circuit 3 controls the dividing circuit 2, and inserts an extension cycle in a designated period. An output circuit 4 outputs a clock signal obtained by the dividing circuit 2. Accordingly, the average frequency of the clock signal is set arbitrarily independently of the reference clock.

Inventors:

Nobuhiko Akasaka
Minoru Igarashi

Application Number:

JP2002126561A

Publication Date:

March 14, 2007

Filing Date:

April 26, 2002

Export Citation:

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Assignee:

富士通株式会社

International Classes:

G06F1/08; H03K21/00; H03L7/00; (IPC1-7): G06F1/08; H03K21/00

Domestic Patent References:

JP8097793A

Attorney, Agent or Firm:

Takeshi Hattori

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