Title:
CLOCK SIGNAL GENERATION CIRCUIT, DC/DC CONVERTER, PWM SIGNAL GENERATOR, AND VEHICLE
Document Type and Number:
Japanese Patent JP2023100015
Kind Code:
A
Abstract:
To reduce radiation noise.SOLUTION: A clock signal generating circuit comprises: a triangular wave generation circuit (111) configured to generate a triangular wave signal (S111); a pseudo-random number generation circuit (112) configured to generate a pseudo-random number signal (S112); a limiter circuit (113) configured to execute a limitation process of limiting an amount of change per unit time in the pseudo-random number signal and generate the pseudo-random number signal subjected to the limitation process as a limiter signal (S113); a linear arithmetic circuit (114) configured to generate a frequency control signal (S114) by performing a linear arithmetic operation on the triangular wave signal and the limiter signal; and an oscillator (120) configured to generate a clock signal (S122) having a frequency corresponding to the frequency control signal.SELECTED DRAWING: Figure 1
Inventors:
SUDO TAKAYUKI
MURAKAMI KAZUHIRO
MURAKAMI KAZUHIRO
Application Number:
JP2022000317A
Publication Date:
July 18, 2023
Filing Date:
January 05, 2022
Export Citation:
Assignee:
ROHM CO LTD
International Classes:
H02M3/155; H03K7/08
Attorney, Agent or Firm:
Patent Attorney Corporation Sano Patent Office