PURPOSE: To obtain a clock switching control device prevented from generating a spike at the time of switching.
CONSTITUTION: The clock switching control device is provided with a control signal generating part 10 for generating a clock switching signal CH2 delayed from a switching signal CH synchronously with one signal C0 out of two kinds of input clock signals C0, C1, a switching part 20 for generating an output clock signal CK1 in accordance with the signal CH2 and a spike generation preventing part for masking a spike by a mask signal DIS2 to be activated synchronously with a signal obtained immediately before the switching of the signal CK1 and inactivated synchronously with a signal obtained immediately after the switching of the signal CK1 and outputting a final output clock signal CK.
JP4056388 | Synchronous multi-output digital clock manager |
JPH01149515 | CLOCK SUPPLYING CIRCUIT |