To provide a clock timing reproducing circuit which can be applied to a multi-level modulation system.

A base band signal is sampled at timing advancing a sample clock to be controlled just for time δt, a square root Ra2 of the said sampled base band signal is obtained, a base band signal is sampled at timing delaying the said sample clock to be controlled just for the time δt, a square root Rb2 of the said sampled base band signal is obtained, and the square roots Ra2 and Rb2 of the said sampled base band signals are compared. As a result of the said comparison, when the square root Ra2 is larger, the said sample clock to be controlled is delayed just for certain fixed time α and when the square root Rb2 is larger, the said sample clock to be controlled is advanced just for certain fixed time α.