Title:
CMOS IMAGE SENSOR AND ITS FABRICATION PROCESS
Document Type and Number:
Japanese Patent JP3936955
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a CMOS image sensor capable of minimizing the occurrence of defect due to impurity ion implantation at the boundary of an active region and an isolation film beneath the gate electrode of a transistor constituting a CMOS image sensor, and to provide its fabrication process.
SOLUTION: The CMOS image sensor comprises a first conductivity type semiconductor substrate provided with a plurality of transistors, an active region overlapping the gate electrode of the transistor, an isolation region contiguous to the active region, and a first conductivity type heavily doped impurity ion region formed between the active region and the isolation region.
Inventors:
Han, Jung Hoon
Kim, Bun Sik
Kim, Bun Sik
Application Number:
JP2004369144A
Publication Date:
June 27, 2007
Filing Date:
December 21, 2004
Export Citation:
Assignee:
Tobu Electronics Co., Ltd.
International Classes:
H01L27/146; H01L21/8238; H01L31/062; H01L31/10; (IPC1-7): H01L27/146
Domestic Patent References:
| JP2000353801A | ||||
| JP2003318379A | ||||
| JP2003142674A | ||||
| JP2003188367A | ||||
| JP2004039832A |
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Shigeki Yamakawa
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