Title:
CMOS TYPE INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH01140809
Kind Code:
A
Abstract:
PURPOSE:To remove unnecessary current consumption by supplying a fixed potential to a static circuit and a clock signal which has been frequency-divided into to a dynamic circuit at the time of non-selection. CONSTITUTION:When an integrated circuit where the static circuit 15 and the dynamic circuit 16 are mix-used is in a selection state, a clock control signal 13 is set to '1' level, and the clock signal 11 is selected in an AND circuit and a two inputs/one output selection circuit 18, and supplied to the circuits 15 and 16. Since the signal 13 is set to '0' level when the integrated circuit is in a non-selection state, the fixed potential of '0' level is supplied from the AND circuit to the circuit 15, and the consumption of the circuit 15 comes to the current of DC components or a leak current. At that time, the clock signal which has been 1/n frequency-divided in a 1/n frequency division circuit 12 is supplied to the circuit 18, and data is held in the circuit 16,whereby consumption power comes to 1/n.
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Inventors:
KANO MASAYUKI
Application Number:
JP29770487A
Publication Date:
June 02, 1989
Filing Date:
November 27, 1987
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G11C11/407; G06F1/06; G11C11/34; H03K19/00; H03K19/096; (IPC1-7): G11C11/34; H03K19/00; H03K19/096
Attorney, Agent or Firm:
Hiroshi Kikuchi