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Title:
CODE CONVERSION CIRCUIT AND CODE CONVERSION MULTIPLEXER CIRCUIT
Document Type and Number:
Japanese Patent JP2000224244
Kind Code:
A
Abstract:

To realize a code conversion circuit and a code conversion multiplexer circuit that can deal with an ultrahigh transmission rate with a simple means.

The code conversion circuit keeps an output logic with respect to a 1st logic of a binary data signal that is n-multiplexed in time division and applies referencial encoding to invert an output logic with respect to a 2nd input logic. In this case, the code conversion circuit is provided with a multiplex pre-conversion circuit 100 that receives a 1st n-parallel electric signal with a signal rate of 1/n before n-multiplexing, outputs a code-converted n- parallel 2nd electric signal, and conducts code conversion so that a 3rd electric signal generated when the n-parallel 2nd electric signal is time division multiplexed for each bit is equal to a signal obtained by referencial encoding after each bit of the binary data is n-multiplexed by time division.


Inventors:
YONENAGA KAZUSHIGE
YONEYAMA MIKIO
MURATA KOICHI
MIYAMOTO YUTAKA
Application Number:
JP2640899A
Publication Date:
August 11, 2000
Filing Date:
February 03, 1999
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04J3/00; H04J3/04; H04L25/02; H04L25/497; H04J14/08; (IPC1-7): H04L25/497; H04J14/08; H04J3/00; H04J3/04; H04L25/02
Attorney, Agent or Firm:
Furuya