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Title:
CODE CONVERTING DEVICE
Document Type and Number:
Japanese Patent JPS62250748
Kind Code:
A
Abstract:

PURPOSE: To have a self-clock function and to realize a 3B-2T code excluding a direct current component by replacing (T1 and T2) to (T1' and T2'), which do not correspond to (B1, B2 and B3), with a 3B-2T code to convert to two symbols (T1 and T2) to obtain three values (=0, 1 and 2) corresponding to three bit binary values (B1, B2 and B3) equally.

CONSTITUTION: A received symbol system is sent to a 2T-38 converter 52 and a No.9 detecting device 53, the converter 52 reversely converts a pair (T1 and T2) of the received symbol to the bit patterns (B1, B2 and B3) of 3 bits in accordance with the Table 1, the detecting device 53 outputs '1' when the (T1 and T2) is equal to the symbol pattern of the No.9 of the Table 1, outputs '0' when it is not equal, and a switch 54 selects the output of a D flip-flop 55 to hold the output of the 2T-3B converter 52 or a 2T-3B converter before one pair respectively by depecding upon the case that the output of the No.9 detecting device 53 is '0' or '1'. Namely, when the ninth symbol pattern is introduced which does not have the equal corresponding relation for 3 bit patterns, previous 3 bits can be correctly decoded. Concerning the 2T-3B converter 52, the output when the pair of the received symbol is the symbol pattern of the No.9 of the Table 1 may be optional 3 bit patterns.


Inventors:
IKETANI AKIRA
Application Number:
JP9537386A
Publication Date:
October 31, 1987
Filing Date:
April 24, 1986
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11B20/14; H03M5/14; H03M5/16; H04L25/49; (IPC1-7): G11B20/14; H03M5/16; H04L25/49
Domestic Patent References:
JPS5464965A1979-05-25
JPS4724952A
JPS4819109A
Attorney, Agent or Firm:
Akira Kobiji (2 outside)