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Patent Searching and Data


Title:
CODE ERROR INSPECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS6398223
Kind Code:
A
Abstract:

PURPOSE: To perform the inspection of a code error without using a memory, by estimating an even-th symbol and an odd-th symbol in each block being inputted in order, separately, and performing the arithmetic calculation of a syndrome corresponding to each row of an inspection matrix.

CONSTITUTION: Since a clock signal 1 corresponds to the even-th symbol in an even-th block, or the odd-th symbol in an odd-th block, a first register 55 generates the syndrome So-o when the symbol is supplied in the odd-th block out of a code word. A register 56 generates the syndrome So-e when the symbol is supplied in the even-th block out of the code word. A data selector 61 takes out the syndrome So-o after the arrival of a clear signal CL1 by a switching signal SLCT in which a clear signal CL3 supplied from a terminal 72 is frequency-divided by 1/2, and outputs a taken out syndrome from a terminal 73 as the syndrome So. In such way, it is possible to perform the arithmetic calculation of the syndrome.


Inventors:
YAMADA YASUHIRO
Application Number:
JP24386986A
Publication Date:
April 28, 1988
Filing Date:
October 14, 1986
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H03M13/27; (IPC1-7): H03M13/22
Attorney, Agent or Firm:
Tadahiko Ito