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Title:
符号化装置、復号化装置、符号化・復号化装置及び記録再生装置
Document Type and Number:
Japanese Patent JP5007676
Kind Code:
B2
Abstract:
An error correction device error corrects without increasing the circuit scale. An encoder includes: a first ECC encoder (235) which interleaves a data string into n (n ‰¥ 2) blocks of data strings at every m (m ‰¥ 2) bits, and adds the error correction code parity; a parity encoder (234) which creates a parity bit at every plurality of bits of the error correction code word, and adds the parity bit to said error correction code word; and a second ECC encoder (220), which generates a second error correction encoding, which is a linear encoding using iterative decoding. Concatenated type encoded data, where a parity bit is added to every plurality of bits, is created, so an increase of circuit scale can be prevented even if a data string is interleaved into a plurality of blocks and error correction code parity is generated. The device may be applied, for example, to a long sector type hard disk.

Inventors:
Toshichi Kanaoka
Toshio Ito
Application Number:
JP2008021282A
Publication Date:
August 22, 2012
Filing Date:
January 31, 2008
Export Citation:
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Assignee:
富士通株式会社
International Classes:
G11B20/18; H03M13/19; H03M13/29
Domestic Patent References:
JP2007299449A
JP2005093038A
JP2004253017A
JP2006060296A
JP2008065969A
JP2008136173A
Other References:
Toshio ITO, Toshihiko MORITA,”ERROR CORRECTING CODES FOR 4K-BYTE SECTORS”,DIGEST OF THE 18th MAGNETIC RECORDING CONFERENCE TMRC-2007,米国,2007年 5月,p.74-75
Attorney, Agent or Firm:
Hayashi Tsunetoku
Kenji Doi