Title:
CODING SYSTEM FOR VIDEO SIGNAL
Document Type and Number:
Japanese Patent JPS5665569
Kind Code:
A
Abstract:
PURPOSE: To enable the processing in byte unit for fixed memories, by adding 0's to the upper rank of code by the number of bits excessive, when the bit length exceeds 8-bit.
CONSTITUTION: The code 8-bit of less is read out and the code bit length is selectively output from output terminals O1∼O7 of the fixed memory 13. If the bit length thus loaded is greater than 8-bit, the output of a NOT circuit 18 is zero to make OFF an AND circuit 17 and 0's are output every clock until it reaches 8-bit.
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Inventors:
IIZUKA YOSHIO
KAYANO TOSHIROU
MATSUNAGA SHIGEO
KAYANO TOSHIROU
MATSUNAGA SHIGEO
Application Number:
JP14084579A
Publication Date:
June 03, 1981
Filing Date:
October 31, 1979
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H03M7/46; G06F3/12; G06F3/153; H04N1/419; (IPC1-7): G06F3/12; G06F3/14; G06F5/00; H04N1/40