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Patent Searching and Data


Title:
COMMUNICATION CONTROL EQUIPMENT
Document Type and Number:
Japanese Patent JPS61103341
Kind Code:
A
Abstract:

PURPOSE: To reset a CPU at a sender of a serial signal by allowing the CPU to be reset automatically when the level of the serial signal is low for a prescribed time or over.

CONSTITUTION: The serial signal is inputted to an input terminal 3 of the CPU 1 receiving data and an output of a Baud rate generator 2 is inputted to an input terminal 5 of the CPU. The serial signal is inputted to a clear terminal 8 of a counter 7 and a clock pulse from the generator 2 is inputted to a clock terminal 9 of a counter 7. The counter 7 is cleared when the serial signal is inputted and generates no output pulse, but when the serial signal is interrupted for a prescribed time or over, the counter 7 generates an output pulse. The output pulse is inputted to a reset terminal 4 of the CPU1 to reset the CPU1.


Inventors:
MORI KEIJIRO
FUJITA NORIO
NAKAMICHI HITOSHI
Application Number:
JP22634984A
Publication Date:
May 21, 1986
Filing Date:
October 26, 1984
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
MATSUSHITA SEIKO KK
International Classes:
H04L29/02; H04L13/00; H04L13/18; (IPC1-7): H04L13/00; H04L13/18
Attorney, Agent or Firm:
Toshio Nakao



 
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