To prevent fraudulent actions without increase in load onto controller of each board.
A communication system performs communication of processing data between a main board 11 comprising a main control circuit 71 and a communication LSIT 33 and a sub-side board 12 comprising a sub-control circuit 72 and a communication LSIT 34. The communication LSIT 33 receives the processing data from the main control circuit 71, adds error correction data to the processing data to perform data conversion, decodes the processing data, and transmits the processing data to the communication LSIT 34. The communication LSIT 34 decodes the processing data received from the communication LSIT 33, adds parity bits to the processing data to perform data conversion, and transmits the processing data to the sub-control circuit 72.
WATANABE MASAOMI
JPH0193230A | 1989-04-12 | |||
JP2012070848A | 2012-04-12 | |||
JP2005049794A | 2005-02-24 | |||
JP2011198263A | 2011-10-06 | |||
JP2009201115A | 2009-09-03 | |||
JP2002185447A | 2002-06-28 | |||
JPH07327029A | 1995-12-12 | |||
JPH0193230A | 1989-04-12 | |||
JP2012070848A | 2012-04-12 | |||
JP2005049794A | 2005-02-24 | |||
JP2011198263A | 2011-10-06 | |||
JP2009201115A | 2009-09-03 | |||
JP2002185447A | 2002-06-28 |
Makoto Suhara