通信システム用フィルタ

Japanese Patent JP5274014

B2

The invention relates to a cascaded scheme in which an RRC filter, a modified RRC filter or other digital filter is implemented at a relatively low data rate, such as twice the symbol or chip rate, or 2×. Interpolation filters are used to increase the data rate to a higher data rate, such as 8×. Decimation filters are used to reduce the data rate from a higher rate, such as 8×, to a lower rate, such as 2×. The coefficients of the digital filter may be adjusted to compensate for characteristics of other components across the entire filter chain. Most of the implementation complexity of the filter chain is consolidated into the relatively low rate (such as 2×) digital filter while interpolation or decimation filters can be implemented at very low cost. The compensation capability provided by the digital filter makes design of simple decimation or interpolation filters much easier. The compensation capability provided by the digital filter, along with the relatively high over-sampling rate for the output of the interpolation filter (or the input of the decimation filter), also makes the design of the preceding (or following) analog filters much easier.

JP3063228	[Title of Invention] Waveform Equalization System
JPS54161251	AUTOMATIC EQUALIZER
JPH09298553	INFORMATION COMMUNICATION NETWORK AND TERMINAL EQUIPMENT THEREFOR

Yang, Aigu
Shabra, Ayman

JP2007536922A

August 28, 2013

October 13, 2005

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MEDIATEK INC.

H03H17/00; H03H17/02

JP3065813A
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EP1067688A1
US5646621

Kiyoji Kuzuwa

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