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Title:
COMMUNICATION SYSTEM FOR PROGRAMMABLE CONTROLLER
Document Type and Number:
Japanese Patent JPH0294733
Kind Code:
A
Abstract:

PURPOSE: To simplify the buffer control and to reduce the communication control time by providing plural fixed reception buffers for highly frequent and high speed communication and a variable reception buffer for low frequent communication into a communication controller.

CONSTITUTION: A host computer requests its own communication controller 23 to set a logic line with an object programmable controller PC. The PC side communication controller 23 receiving a line set request via a transmission line 22 sets a line immediately and sets an optimum reception buffer to the kind of processing to an area secured in advance. That is, plural fixed reception buffers for a logic circuit set for a communication opposite party and each data kind as highly frequent high speed communication and one variable reception buffer for a logic circuit not set prepared for low frequent communication for program transfer or monitor or the like with the host computer are provided. Then the processing is executed in an optimum form.


Inventors:
MASUDA SHIGERU
SANO MASAHIRO
ITO JUNKO
HAMANO JUNICHI
Application Number:
JP24401688A
Publication Date:
April 05, 1990
Filing Date:
September 30, 1988
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04L13/08; H04L12/40; (IPC1-7): H04L12/40; H04L13/08
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
Next Patent: JPH0294734