To provide a method for manufacturing a field effect transistor having a counter electrode that can enhance its miniaturization and ease in its realization.
An etching mask, comprising a profiling pattern of a gate electrode 9, a source contact 12, a drain contact 13, and a counter-electrode contact, is formed on a substrate of semi-conductor on insulator type. The substrate is covered by a layer of a dielectric material 5 and a gate material. The counter-electrode contact is located in the pattern of the gate electrode 9. The gate material is etched to define the gate electrode 9, the source contact 12 and drain contact 13, and the counter-electrode contact. A part of a support substrate 2 is released through a pattern of a counter-electrode contact area. An electrically conductive material 22 is deposited on the free part of the support substrate 2 to form the counter-electrode contact.
OLIVIER TOMAT
PHILIP COLONELLO
STEPHANE DELORME
ST MICROELECTRONICS CROLLES 2 SAS
Yasukazu Sato
Yasushi Kawasaki
Takeshi Sekine
Akaoka Akira
Daisuke Kimoto