Title:
COMPARATOR CIRCUIT
Document Type and Number:
Japanese Patent JP3826279
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a comparator circuit in which a delay time from the start of the condition of Vin1=Vin2 of input signals to the end of an output change in rise is approximately equal to that in fall.
SOLUTION: The comparator circuit is provided with a transconductance amplifier 1A for outputting a current Ic by amplifying the differential voltage of first and second input signals Vin1 and Vin2, a constant current source 21 connected to a power source Vdd, a transistor Mp connecting an output Iref of the constant current source to its source, connecting any one of the first and second input signals (Vin1 or Vin2) to its gate and connecting its drain to the output side of the transconductance amplifier 1A, and an output means with the drain of the transistor Mp as output.
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Inventors:
Kimiyoshi Miso
Application Number:
JP2002042470A
Publication Date:
September 27, 2006
Filing Date:
February 20, 2002
Export Citation:
Assignee:
Fuji Electric Device Technology Co., Ltd.
International Classes:
H03K5/08; (IPC1-7): H03K5/08
Domestic Patent References:
| JP7183776A | ||||
| JP2001203564A | ||||
| JP2001267893A | ||||
| JP2001285037A | ||||
| JP2002217691A | ||||
| JP2002009589A |
Attorney, Agent or Firm:
Hiroshi Yamamoto
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