PURPOSE: To implement high integration, by forming the second channel region in the region of the first channel, and extracting a gate electrode from a vertical opening part, which is communicated to both regions.

CONSTITUTION: On the surface of a P type semiconductor substrate 20, an N type growing layer 21 is formed. A P type separating layer 22 is formed in the N type growing layer 21, and an N-channel region 21a is formed. At the central surface part of the region 21a, a P type diffused layer 23 is formed and made to be a P-channel region. In the regions 21a and 23, a circular longitudinal P+ type diffused layer and an N type diffused layer 25 are formed, respectively. A P type ion implanting layer 26 and an N type ion implantin layer 27 are formed so that the circular lower end parts of the diffused layers are connected. A vertical type opening part 29, which is communicated with the regions 21a and 23, is formed. A gate oxide film 30 is formed on the side wall of the opening part. A common gate electrode for the N channel and the P-channel is formed on the gate oxide film 30.