PURPOSE: To change the decoding speed, by writing in this set value to the memory at a bundle, when the number of bits of signal to be decoded is more than a set value.
CONSTITUTION: The run length code is inputted to the latch 10, and block and white information of video element train is inputted to FF12 for set or reset. The number of video elements of the run length code and the output of the setter 34 are compared at the comparison circuit 30, and if the number of elements of run length code is greater, the control pulse generation circuit 16 outputs the control signal S2 to perform batch write-in of the number of bits set with the setter 34 in the memory 24. The decoding information for the remaining number of bits is written in the register 22 bit by bit. When the addition of the remaining number of bits reaches the set number in the decoding of run after that, batch write-in is made to the memory 24.
KOSEKI MINORU
AIKAWA KAZUHISA
HORIE MASAKATSU
| JPS5034212A | 1975-04-02 |