PURPOSE: To increase the injection efficiency of minority carriers from the side of a drain electrode, to make a switching speed fast and to enhance reliabil ity by a method wherein a p+ compensation layer is formed between an n+ buffer layer and a p+ silicon layer and a lattice constant is made proper.

CONSTITUTION: A p+ compensation layer 31 whose conductivity type is the same as that of a p+ silicon layer 3 and whose lattice constant is nearly equal to that of the layer 3 is formed between the layer 3 and an n+ buffer layer 2. Boron B for doping use is added to the layer 3 and phosphorus P for doping use is added to the layer 2. The lattice constant of the layer 31 can be matched to the lattice constant of the layer 2 laminated on it when the concentration ratio of an additive element Al, Ga or In to B is made proper. Thereby, a misfitting dislocation is reduced at a p+/n+ junction interface when the layer 2 is laminated; the recombination center can be reduced; the injection efficiency of minority carriers from the side of a drain electrode can be increased; a switching performance can be increased; and it is possible to prevent a destruction from being caused.