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Title:
CONFIRMATION SYSTEM FOR LOADING AND UNLOADING OF MEMORY CASSETTE
Document Type and Number:
Japanese Patent JPS5647978
Kind Code:
A
Abstract:

PURPOSE: To reduce the load of CPU on the execution of a check program by preventing the occurrence of an error during the arithmetic execution of CPU, by storing RAM the loading-unloading state of a memory cassette.

CONSTITUTION: When one of memory cassettes CT1WCT4 is newly loaded or unloaded, CPU1 starts the interruption processing for making sure of the loading- unloading states of cassettes CT1WCT4 with inversion signal INT' sent via control bus line CB and then sends and stores the processing results in areas F1WF4 of RAM2. In this case, "1" when a cassette is loaded, or "0" when it is unloaded, is written in each area. For example, a fixed value enters in area F1 according to the conduction and nonconduction between terminals 6m and 8m of CT1 connection terminal part 5 and connection terminal part 7 of connector CN1, and CPU1 checks it to make sure the loading and unloading.


Inventors:
KAWAI HIROHIKO
Application Number:
JP12141879A
Publication Date:
April 30, 1981
Filing Date:
September 20, 1979
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
G11B15/68; G06F11/00; (IPC1-7): G11C5/00
Domestic Patent References:
JPS4980940A1974-08-05
JPS4725523A