Title:
CONNECTING METHOD OF ELECTRODE OR WIRING LAYER TO SEMICONDUCTOR OR CONDUCTOR LAYER IN SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS57173959
Kind Code:
A
Abstract:
PURPOSE:To obtain a larger contact surface by a method wherein the surface of a semiconductor layer within a window whereto an electrode is connected is provided with a ruggedly formed surface. CONSTITUTION:In a semiconductor substrate 1 with regions 3 and 4 formed inside and insulator layers 5 and 8 formed outside, the insulator layer 8 is provided with a mask 12 for boring windows and the insulators 5 and 8 are subjected to gas plasma etching in a mixture exemplifiedly of CF4 and H2. The etching is so effected that resultant windows 13 and 14 contain columns 15 and 16 surviving the process. The columns 15 and 16 act as masks in another process of etching the semiconductor regions 3 and 4 in the windows 13 and 14 to obtain rugged surfaces 18 and 19 in the regions 3 and 4. Electrodes 20 and 21 are respectively built in the windows 13 and 14 after removed of the mask layer 12 and the columns 15 and 16, which realizes very large contact surfaces between the regions 3, 4 and the electrode 20, 21.
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Inventors:
OZAKI YOSHIHARU
HIRATA KAZUO
KIUCHI KAZUHIDE
HIRATA KAZUO
KIUCHI KAZUHIDE
Application Number:
JP6006681A
Publication Date:
October 26, 1982
Filing Date:
April 21, 1981
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H01L23/522; H01L21/28; H01L21/302; H01L21/3065; H01L21/768; H01L29/41; (IPC1-7): H01L21/28; H01L21/302